I’ve been working on a JIT for 64-bit little endian Power ISA, currently compatible with POWER9 OpenPOWER systems, which now passes the full test suite. The two pieces left are support for POWER8 and enabling the optimizing Wasm JIT, but it’s good enough to ship now, and we can get those other pieces completed assuming it sticks. This is a descendant of the TenFourFox JIT for 32-bit PowerPC, but upgraded to 64-bit and uses the little-endian mode supported on POWER8 and later.
Here is the answers to the template at https://spidermonkey.dev/port-proposal-template as requested:
Is the stack-direction the same as x86?
Is the code for a little-endian architecture?
How is this architecture different from x64 or ARM64?
ppc64le’s main differences from x64 are that it uses a link register, it has up to eight independent condition codes plus other condition codes in special purpose registers, it does not have strict store ordering, and it is a fixed-length instruction word (even Power10, which has “double” instructions, still aligns to a 32-bit word). Like MIPS, there is a limited displacement for branches and offsets.
ppc64le’s main differences from ARM64 is that it has up to eight independent condition codes plus other condition codes in special purpose registers, and that the link register is not a GPR (it’s a special purpose register), which requires it to be transferred and pushed separately.
Additionally, the standard ABI for Power ISA requires a linkage area of no less than 32 bytes on the top of the stack for the callee to store the link register, condition register, stack pointer and TOC register. This is dealt with in the port by pulling down dummy frames as necessary at ABI-Ion and ABI-Wasm edges (otherwise things like the Wasm Frame would get walloped, since it sits on top of the stack).
Do you expect that changes will be needed to the design or architecture of the JITs to support this architecture? Or would you be ok without JIT support?
Not substantially. There are small point adjustments that are required, as there are for all the other existing architectures, but no massive surgery is needed to introduce the Power ISA port.
Any other comments regarding the technical impact of porting to this architecture.
A public Baseline JIT has been published against 115ESR, though this is a draft, and needs to be cleaned and pulled up to mozilla-central for submission. See https://www.talospace.com/2023/09/partial-ppc64le-jit-available-again-for.html
The additional Ion and basic Wasm patches are being circulated to internal testers.
Who will be the contact person(s) of this project?
Me, Cameron Kaiser, ckaiser at floodgap dawt com
Do the contact person(s) have dedicated time to maintain the port?
Yes, and I think my history with TenFourFox speaks for itself.
Do you have a plan for testing the port (continuous integration or similar)
Currently community members test the JIT and there is a JIT copr project with Fedora’s port maintainer. There appears to be sufficient coverage currently in the test suite to identify early problems introduced with new JIT features.
Any other comments about maintenance?
As above, I’ve already written an Ion JIT for SpiderMonkey and maintained it separately as part of TenFourFox, and I have a long history with Mozilla as a community member and occasional contributor. There is also corporate support from Raptor Computing Systems, who are the major vendor of workstation POWER9 systems (this is being typed on a dual-8 64-thread Raptor Talos II).
How commonly used is the architecture you are targeting?
64-bit Power ISA is still a significant server architecture, and Raptor POWER9 systems are currently the most powerful machines that have FSF Respects Your Freedom certification which has led to a growing workstation community.
What use cases does SpiderMonkey running on this port open up which were closed before?
What use case(s) does this open for Firefox?
Greater performance and additional support for a documented open computing platform consistent with Mozilla’s core mission.
Is there a business case for this port for Mozilla or Firefox?
There is for SpiderMonkey, as Power ISA’s presence in server and HPC systems may make it a JIT-enabled version competitive with V8 for server-side applications.
Any other comments regarding impacts the port may have more broadly?
Do you have any further information you’d like us to know?
I think I hit the main points. This first iteration (blinterp, Baseline and Ion, plus Baseline Wasm) can be ready for code review within a couple weeks if there’s interest. I’d submit it as new files, plus break out changes separately against irregexp/, jit/ and wasm/.